1. Field of the Invention
This invention relates to arrays of semiconducting elements, such as Schottky diodes or transistors, integrated in wafers. The semiconducting elements are arranged as a matrix to make up said arrays which are customized to ensure a given function. For instance, they can be used as AND or OR matrix in programmable logic arrays (PLA) or as read-only memories provided with better characteristics of density and power dissipation.
2. Background Art
The matrix arrays of semiconducting elements making up read-only memories or the AND or OR matrix of a PLA device are today well known in the art and in current use. In particular, French Pat. No. 71 16554 describes a read-only memory including Schottky diodes as memory cells. In said read-only memory, the diodes of a given row are located in a pocket of semiconducting material forming the cathodes of said diodes and said cathodes are interconnected through an embedded layer. Isolating walls are provided between the diode columns. In such a memory, the fact that diodes are present, or are not present, represents an information bit, i.e. a "1" or a "0".
Such an arrangement is particularly advantageous since it provides a better density than in the conventional arrangements in which each diode is located in an isolation pocket. But since the embedded layer shows a resistivity which is low but cannot be neglected, it is not possible to design very dense arrays.
In general, programmable logic arrays are comprised of a AND matrix and a OR matrix which are customized to ensure a given function. The book of William N. Carr and Jack P. Mize entitled "MOS/LSI and Application" published by McGraw Hill Book Company, "Texas Instruments Electronics" series, provides a general description of programmable logic arrays. The AND and OR matrices are integrated into wafers which are customized by providing or not a semiconducting element such as a Schottky diode or a transistor on each point of the matrices in accordance with the function to be ensured by the PLA array. Therefore, when a PLA array is to be used, first of all, the contents of the various matrices must be determined and then, the wafers must be customized. In fact, said customization step is identical to the step performed for writing information into a read-only memory and therefore, the AND or OR matrices show the same structures as the read-only memories and can be embodied by applying the same processes and more particularly, by applying the processes described in the above indicated patent.
Accordingly, this invention provides arrays of semiconducting elements which can be used as read-only memories or to make up high-density programmable logic arrays the performance of which is unaffected by said high density.